ASML ships first "High NA" lithography system to Intel

[Hamartia Antidote]

https://www.reuters.com/technology/asml-ships-first-high-na-lithography-system-intel-statement-2023-12-21/

ASML logo is seen at a building near the headquarters in Veldhoven, Netherlands June 16, 2023. REUTERS/Piroschka van de Wouw/File Photo Acquire Licensing Rights

AMSTERDAM, Dec 21 (Reuters) - Dutch semiconductor equipment maker ASML (ASML.AS) said on Thursday it is shipping the first of its new "High NA" extreme ultraviolet lithography systems to Intel (INTC.O) Corp.

The new machines, which will cost more than $300 million each, are expected to help computer chip makers produce smaller, faster semiconductors.

ASML published an image of one segment of the machine departing from its headquarters in Veldhoven, Netherlands, in a protective case with a red ribbon tied around it, on the X social media platform.

"We're excited and proud to ship our first High NA EUV system to Intel," the statement said.

ASML dominates the market for lithography systems - machines that use lasers to help create the circuitry of chips. The High NA machines, which when assembled will be larger than a truck, are being shipped in 250 separate crates, including 13 large containers. They are expected to be used in commercial chip manufacturing starting in 2026 or 2027.

Intel ordered the first of the High NA pilot machines in 2022. Other chip manufacturers that have ordered the machines include TSMC (2330.TW), Samsung (005930.KS), SK Hynix (000660.KS) and Micron (MU.O).

ASML told reporters on Nov. 30 the company expected to ship the first of the pilot tools before the end of the year.

 

[Hamartia Antidote]

https://www.extremetech.com/computing/intel-vp-says-the-company-is-ready-to-begin-2nm-production-in-2024

Intel VP Says the Company Is Ready to Begin 2nm Production in 2024​

 

[Hamartia Antidote]

Intel receives first High-NA EUV chipmaking tool from ASML — Intel is the first pathfinder for revolutionary new lithography tech

Assembly of Intel's first High-NA EUV machine starts shortly.

www.tomshardware.com

Intel receives first High-NA EUV chipmaking tool from ASML — Intel is the first pathfinder for revolutionary new lithography tech​

Assembly of Intel's first High-NA EUV machine starts shortly.

(Image credit: Intel)

On Friday, Intel announced that it had received the first major components of ASML's extreme ultraviolet (EUV) lithography tool. The two companies will begin assembling the machine shortly as Intel hopes to be the first company to use High-NA EUV equipment for mass production of chips in the coming years. The tool uses a 0.55 numerical aperture lens (High-NA), thus allowing chipmakers to print smaller features on processors than was previously possible. We previously covered ASML's announcement last month that it had begun shipping the tool to Intel.


"Intel Oregon welcomes major components of ASML's shipped High-NA EUV technology to help enable the continued and relentless pursuit of Moore's Law," a statement by Intel reads.

(Image credit: Intel)

ASML's Twinscan EXE lithography tool is a huge machine shipped in 250 crates spread across 13 cargo containers on 13 trucks. ASML sent the first container from Veldhoven, the Netherlands, on December 21 and now Intel received it at its site near Hillsboro, Oregon. In the coming months, the tool will be assembled at Intel's D1X Mod3 research fab, where the company's engineers will learn how to use the tool to produc

(Image credit: ASML)

High-NA EUV litho machines are outfitted with a 0.55 NA (High-NA) lens that can achieve a resolution of 8nm, a major improvement over existing EUV tools — the existing 0.33 NA (Low-NA) lens offers a 13nm resolution. The resolution improvement will be crucial for post-2nm technologies requiring either Low-NA EUV double patterning or High-NA EUV single patterning. Each EUV High-NA scanner is expected to cost from $300 million to $400 million.

(Image credit: ASML)

Intel will start installing the Twinscan EXE:5000 machine that can process 150 wafers per hour (at a dose of 30mJ/cm^2) with a <1.1nm matched-machine overlay performance. This machine will be used primarily to learn how to use High-NA EUV with Intel's 18A (18 angstroms, 1.8nm) process technology, but the real high-volume manufacturing (HVM) will commence using a post-18A node on ASML's Twinscan EXE:5200 machines. These machines will increase productivity to 220 wph and imaging performance to <0.8nm matched-machine overlay.


Intel wants to get back its fabrication technology leadership, and the company hopes to do so with 18A. With High-NA-enabled post-18A production nodes, Intel not only hopes to maintain power, performance, and area leadership but essentially establish its own standards when it comes to High-NA manufacturing. This could prove to be a strategic advantage over its rivals, much like TSMC's pathfinding work with the first Low-NA machines helped it establish and maintain a lead over Intel.

 

[TruthSeeker]

2 nm process​

2 nm process - Wikipedia

en.wikipedia.org

In semiconductor manufacturing, the 2 nm process is the next MOSFET (metal–oxide–semiconductor field-effect transistor) die shrink after the 3 nm process node. As of May 2022, TSMC plans to begin risk 2 nm production at the end of 2024 and mass production in 2025; Intel forecasts production in 2024, and Samsung in 2025.

The term "2 nanometer" or alternatively "20 angstrom" (a term used by Intel) has no relation to any actual physical feature (such as gate length, metal pitch or gate pitch) of the transistors. According to the projections contained in the 2021 update of the International Roadmap for Devices and Systems published by the Institute of Electrical and Electronics Engineers (IEEE), a "2.1 nm node range label" is expected to have a contacted gate pitch of 45 nanometers and a tightest metal pitch of 20 nanometers.

Process	Gate pitch	Metal pitch	Year
7 nm	60 nm	40 nm	2018
5 nm	51 nm	30 nm	2020
3 nm	48 nm	24 nm	2022
2 nm	45 nm	20 nm	2024
1 nm	42 nm	16 nm	2026

As such, "2 nm" is used primarily as a marketing term by the semiconductor industry to refer to a new, improved generation of chips in terms of increased transistor density (a higher degree of miniaturization), increased speed, and reduced power consumption compared to the previous 3 nm node generation.